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Design and Development of 4-Bit Gray Code Counter Circuit Using Reversible Logic Gate

[ Vol. 13 , Issue. 1 ]

Author(s):

Heranmoy Maity*, Barnali Sen , Ishika Verma , Arindam Biswas , Anita Pal and Anup K. Bhattacharjee   Pages 124 - 127 ( 4 )

Abstract:


The reversible logic system is a very promising field of quantum computing, both reversible combinational and sequential circuits are equally important for quantum computing. In this paper, the reversible 4-bit gray code counter using a reversible gate is proposed. The proposed reversible circuit can be designed using SAM gate, Feynman gate (FG), double Feynman gate (DFG), and NOT gate. The proposed circuit is the combined application of 4-bit binary asynchronous counter and 4-bit binary to gray code converter circuit. Therefore, the design of the counter and code converter is not required separately. The quantum cost (QC), garbage output (GO), and constant input (CI) of the proposed circuit are, respectively, 30, 8, and 7.

Keywords:

Quantum computing, gray code, reversible logic gate, quantum cost, garbage output, constant input.

Affiliation:

Dept. of ECE, NSHM Knowledge Campus Durgapur, West Bengal, Dept. of ECE, NSHM Knowledge Campus Durgapur, West Bengal, Dept. of ECE, NSHM Knowledge Campus Durgapur, West Bengal, School of MM, Kazi Nazrul University, Asansol, Dept. of Mathematics, National Institute of Technology, Durgapur, Dept. of ECE, National Institute of Technology, Durgapur



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